Bonded Cu Interconnects for
 Three--Dimensional Integrated Circuits



Carl V. Thompson and Rajappa Tadepalli Materials Science and Engineering and Microsystems Technology Laboratory MIT
Kevin T. Turner, Dept. of Mechanical Engineering, U. Wisconsin and Chee Lip Gan, School of Materials Engineering, Nanyang Technical University


Outline:

  • Strategies for 3D ICs
  • The case for metal-metal bonded interconnects
  • Issues for metal-metal bonded Interconnects
  • Recent results from our group 
    • low temperature (room temperature) Cu-Cu bonds
    • bond strength
      • mode-mixity, patterning
      • metal-metal vs. oxide-oxide
  

Technology Options for 3D ICs

 

K. C. Saraswat, Stanford Univ. 


  
Wafer bonding enables low-temperature (<4000C) heterogeneous integration
 
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